Technology often demands the patterning of features smaller than those lithographically possible. For example, while patterning features, such as contact holes and vias, it may be desirable to have features with critical dimensions defined in the substrate that are smaller than lithographically defined in the resist. The critical dimensions of a feature comprise the characteristic dimensions of the feature attained by the technology employed. Conventional techniques to reduce the critical dimensions of patterned features exist, however, these techniques have several drawbacks.
One common technique to reduce the critical dimensions includes the use of resist reflow and overcoat films, e.g., resolution enhancement lithography assisted by chemical shrink (RELACS) processes. Resist reflow is extremely difficult to control because very small temperature variations across the bake plate can cause large variations in the critical dimensions across each wafer. Typical sensitivities are on the order of ten nanometers per degree celcius (nm/° C.). Overcoat films can be spun on top of a photo-developed chemically amplified resist. The photoacid from the resist diffuses into the overcoat film crosslinking it. The parts of the overcoat film that are not in physical contact with the resist, for example, a feature bottom, are not crosslinked, and therefore can be developed away. This technique, being highly specific to the resist type, is difficult to implement. Moreover, the crosslinked overcoat film offers poor etch resistance during the substrate etch step, thus, negating any reductions in critical dimensions obtained. Silylating resists can also be used to chemically bias resist features, but they also suffer from cross-wafer and nested-isolated bias issues. The above techniques may further result in features having corners that are not sharp, but rounded.
Another common technique is to use a polymerizing etch chemistry to induce a taper in the substrate thereby reducing the critical dimensions at a feature bottom. The critical dimensions of the feature at the top of the substrate are approximately the same as the critical dimensions obtained after etching an overlying layer, e.g., an antireflective layer. The feature sidewalls created in the substrate are slightly tapered, which is desirable for many applications. For example, after contact holes or vias are patterned in a dielectric layer, the copper seed layer deposition is facilitated by dielectric substrate sidewalls that are not perfectly vertical, but slightly tapered. However, the maximum amount of reduction of the critical dimensions depends on the amount of sidewall taper that can be tolerated. As an example, if the dielectric layer is about 500 nanometers (nm) thick and if the sidewall is about 88.5 degrees to the horizontal, the feature bottom will be approximately 20 nm smaller than the feature top. If the critical dimensions of the feature top is too large to begin with, the effectiveness of this technique is at best very limited.
Therefore, it would be desirable to have techniques for reducing the critical dimensions of patterned features that are effective, reproducible and versatile for patterning features having a broad range of critical dimension specifications. Further, techniques for reducing the critical dimensions of patterned features are needed that can be employed irrespective of the type of resist used, and provide for the mass-production of features that are uniform over entire wafers.